This invention pertains to phase-locked loops (PLL) and involves techniques applicable to clock generators incorporated into microprocessors.
PLL's have been finding applications in clock generators. For example, a PLL is used for the phase lock between circuit blocks of a microprocessor and for the generation of a multiplication-frequency clock signal.
FIG. 10 illustrates the conventional configuration of PLL's. A PLL of FIG. 10 comprises a phase detector 30, a filter 31, a voltage-controlled oscillator (VCO) 32, and a frequency divider 33. The phase detector 30 compares the phase of an incoming reference signal .phi.1 with that of an internal signal .phi.2, thereby producing an analog phase difference signal (V.sub.pc) proportional to the phase difference found between the signals. The filter 31 integrates the V.sub.pc to produces a phase control signal (V.sub.cnt). The VC0 32 produces a basic clock signal (.phi.0) according to the V.sub.cnt. The output frequency of the VCO32 is controlled according to the input voltage (i.e. the voltage of the V.sub.cnt, or the control voltage), which causes a change in the frequency of the .phi.0. The frequency divider 33 is a divider which frequency divides the .phi.0 to produce the internal signal .phi.2 with a 50% duty ratio. This .phi.2 is fed back to the phase detector 30 as one input thereof. For example, if the frequency divider 33 is given a divide ratio of 1/4, and if an output whose frequency is one-half that of the .phi.0 is fetched from the intermediate tap, it is possible to produce a 50%-duty-ratio multiplication-frequency clock signal whose frequency is twice that of the .phi.1.
A PLL of this type is disclosed by I. A. Young et al ("A PLL Clock Generator with 5 to 110 MHz Lock Range for Microprocessors", ISSCC Digest of Technical Papers, pp. 50-51, February, 1992).
The effect of expanding the frequency variable-range of a PLL is known. For example, the expansion of a PLL frequency variable-range gives an advantage to distinguish the use of a high-frequency part of the expanded range from the use of a low-frequency part. In other words, the high-frequency part is assigned to actual operations and the low-frequency part to operation testing. Test tools used for testing in the low-frequency range are available at a low price compared to ones for testing in the high-frequency range. Accordingly, low-cost testing is achievable. However, for the case of a conventional PLL like the one as shown in FIG. 10, the expansion of a PLL frequency variable-range presents a difficult problem. In other words, it is hard to realize a VCO having a highly linear input/output characteristic, since, if a PLL frequency variable-range is expanded, such an expanded frequency variable-range must be covered by the VCO 32 alone. In addition to such a problem, other serious problems such as one which causes delays in the pulling of a PLL, or increases the pull-in time of a PLL.